Make

(…) Make provides a way to save the command sequences needed to perform transformations. It automatically executes a sufficient sub-sequence of the commands after checking which files have changed. Make was designed to simplify life for the developer and maintainer of moderately complex programs, but it has proved to be a very useful tool for a much larger range of problems than was originally expected.

(Feldman 1979, 1–2)

  SOURCES = main.c helper.c
  OBJS = $(SOURCES:.c=.o)
  TARGET = main

  # Compiler 
  CC = gcc  
  # Extra Flags
  OPTS = -Wall 
  # Libraries that need to be linked beforehand
  LIBS = -lm 

  $(TARGET): $(OBJS)
      $(CC) -o $(TARGET) $(OBJS) $(LIBS)

  %.o: %.c
      $(CC) $(OPTS) -c $< -o $@

  clean:
      rm -f $(OBJS) $(TARGET)